Copper anneal in the semiconductor industry. Ovens, furnaces and RTP equipment
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In the manufacturing of semiconductor devices copper lines and copper vias are used more and more instead of aluminium, although the metal contamination risk is much higher, the wall adhesion on dielectrics is worse, and the corrosion resistance of Cu is poor. However the conductivity of copper is much higher, which is an important fact for high-integrated devices. Electromigration resistance is higher for copper.
Damascene technology is used for the deposition of copper. This technology is named after an ancient technology used for the multi-layer manufacturing of swords in Damascus.
On the silicon diffusion barriers, in some cases etch stop layers,
and dielectric layers are deposited. Then lines and vias are patterned and etched,
followed by the deposition of a copper seed layer. Diffusion barrier layers of titanium nitrid,
tantalum or tantalum nitride as well as copper seed layers are deposited on the wafer
by sputter technology. The openings are filled with copper,
using electroplating technology. The growth of the copper layer is
polycrystalline. The size of the grains depends on the substrate surface,
the growth conditions as well as on the size of the graves and vias.
In order to improve the properties of the copper layer an Cu anneal step is absolutely necessary. Finally the excess copper has to be removed. This is done by chemical mechanical polishing CMP.
Finally the cupper layer is encapsulated by a silicon nitride layer.
The complete process is repeated up to 8 times in order to build a multilayer structure.
On this site, we want to discuss the copper anneal process in
The anneal process has several effects on the copper layer:
1) Enlargement of the grain size. Grain size during electroplating depends on the line width of the copper graves and is smaller in areas of thin lines. By enlarging the grain size, the conductivity of the copper increases. A bamboo structure is created, where the grains span the full width of the line. Electroplated Cu films demonstrate an intriguing phenomenon known as "self-annealing"; the as-plated films are not stable and their microstructure evolves even at room temperature. However recrystallization is not under control and not uniform in this case and depends also on the width of the Cu lines. An anneal process is therefore recommended.
2) Removing the tension from the material. The microstructure gets stabilized, dislocations are removed, interface energy is reduced, structured 111 texture growth along the trench walls is reduced. Via pullout voids are prevented and wall detachments of the copper layer can be avoided. The different thermal expansion coefficients of dielectric and copper can promote such detachments. Introducing a copper anneal process helps to prevent such defects of the devices.
3) Reduction of electromigration. Electromigration is an atomic-scale phenomenon whereby the moving electrons that constitute electrical current collide with stationary atoms of the interconnect and push these atoms in the direction of the electron flow. This effect happens at narrow ranges mainly in vias and can lead in worst case to a contact void. Circuit paths with a bamboo structure, where grain boundaries along the current flow direction are missing show increased resistivity to electromigration effects.
Copper anneal can be performed with different equipment:
1) CLH clean oven. The most simple method to do a copper anneal process, is the usage of a clean convection oven with an integrated HEPA filter. The JTEKT Thermo Systems (previously Koyo Thermo Systems) CLH ovens are loaded manually with metal cassettes. A wafer transfer from cassette to cassette is necessary. The oven can be used for temperatures between 100°C and 450°C. The atmosphere is inert gas (nitrogen).
The Temperature uniformity is in the range of +/- 5°C; cleanroom class is 100. Up to 8 cassettes for 200mm wafers can be placed in the oven. The max. capacity is therefore 200 wafers. The oven is available with several different controllers. You can find a more detailed description of this oven on our special CLH oven site.
2) The automatic version of the clean oven is the JTEKT anneal station SO2, designed for 300mm wafer processing. A convection oven based on to the model CLH is used together with an automatic loading and unloading station.
Two FOUPs for 300mm wafers each for loading and unloading are installed. Capacity is 50 wafers/run. The anneal process can be done fully automatic and cost effective. You find more details about this product on our box oven page.
3) A more elegant method is the usage of vertical furnaces. In this case, the furnace performance is much higher, temperature uniformity is in the range of +/- 1°C or better and cleanliness is also improved. It is possible to use special atmospheres like forming gas. Equipment costs are higher, but still in an acceptable relation to the process performance improvements. The process temperature of 200°C is no problem for JTEKT furnaces, because JTEKT uses special, low thermal mass LGO heating elements, which show good control already from 130°C.
Investigations showed that at 200°C an anneal time of 30-60 Min. is sufficient in order to achieve reasonable copper layer properties. JTEKT can offer small vertical furnaces for research and development as well as mass production tools. You find more details on our vertical furnace page.
4) RTP. Rapid thermal processing equipment type JTEKT 3106, 3108 or 3312 can be used for the copper anneal process also. Lamp arrays with crossed lamps above and below the silicon wafer ensure an effective, fast, and uniform heating of the wafer. Because of the low thermal mass, cooling takes place also with high speed. While using the fast heating and cooling rates of the RTP system, an anneal time of 45s is sufficient in order to get similar anneal effects than a 30 Min. oven or furnace anneal. The thermal budget is much smaller in case of an RTP system, but throughput of this method is only 1/2 or 1/4 of the batch process in a vertical furnace. It is possible to use special atmospheres like forming gas.
RTP equipment from JTEKT Thermo Systems (previously Koyo Thermo Systems) is available for wafer sizes between 150mm and 300mm.
All 4 versions of anneal equipment are used in praxis. It has been found that the best conditions in order to get good copper properties are low temperature anneals (<200°C) for longer time (45s in RTP or 30 Min. in oven or furnace). It has to be considered that recrystallization in small structures takes longer time than in larger ones.
At increased temperature (400°C) RTP anneal is more effective than furnace anneal, however the high temperature causes some disadvantages like increased surface roughness of the copper. The presence of hydrogen during anneal can increase this roughening effect. Also the probability of via pull out voids increases. Low-k dielectrics can partially loose their isolation properties at temperatures higher than 250°C. Electromigration effects also start getting worse with higher anneal temperatures. Last but not least the copper contamination risk grows at higher temperature.
The selection of the process equipment depends on the customer requirements in regards of process requests and automation level. Please allow us to advise you.
Please contact us in order to receive more information about copper anneal and about our equipment. Test runs can be done on our furnace installed in the Tenri application laboratory.